library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity decoder2to4 is
    Port (
        input  : in  STD_LOGIC_VECTOR (1 downto 0);  -- 2-bit input
        output : out STD_LOGIC_VECTOR (3 downto 0)  -- 4-bit output
    );
end decoder2to4;

-- Architecture definition
architecture Behavioral of decoder2to4 is
begin
    process(input)
    begin
			case input is
				 when "00" => 
					  output <= "0001";  -- Output 0001 when input is 00
				 when "01" => 
					  output <= "0010";  -- Output 0010 when input is 01
				 when "10" => 
					  output <= "0100";  -- Output 0100 when input is 10
				 when "11" => 
					  output <= "1000";  -- Output 1000 when input is 11
				 when others => 
					  output <= "0000";  -- Default case, output 0000
			end case;
    end process;
end Behavioral;